Master Course Description for EE-271 (ABET sheet)

Title: Digital Circuits and Systems

Credits: 5 (4 lecture, 1 lab)

UW Course Catalog Description

Coordinator: Scott Hauck, Professor, Electrical and Computer Engineering

Goals: To provide a fundamental understanding of digital hardware systems and their design. EE-271 is tightly coupled with CSE-369, with the expectation that students that complete either EE-271 or CSE-369 will have reached a similar level of understanding of the design of digital circuits and systems.

Learning Objectives:

At the end of the course, students will be able to:

  1. Design and implement digital circuits and systems in the laboratory using fundamental concepts.
  2. Write Boolean equations for basic combinational logic circuits, use Boolean algebra to simplify such equations, then implement the resulting designs in the laboratory.
  3. Design and implement combinational circuits of medium complexity in the laboratory.
  4. Design and implement basic sequential circuitry and finite state machines in the laboratory.
  5. Identify real world timing problems in both combinational and sequential circuits and design basic digital systems that are tolerant of such effects.
  6. Design and implement combinational and sequential circuits using programmable logic devices.
  7. Develop basic structural models of digital systems using the Verilog hardware design language.

Textbook: Brown, Stephen and Vranesic, Zvonko, Fundamentals of Digital Logic with VERILOG DESIGN, 3rd Ed., McGraw-Hill, 2014.

Reference Materials: Documents for Verilog, TTL/CMOS.

Prerequisites: CS-142

Topics:

  1. Number systems: positional number system, negative number representation.
  2. Boolean algebra: logic gates, basic theorems of Boolean algebra, minimization by formulas, incompletely specified functions.
  3. Combinational circuit design; integrated circuit characteristics, encoders, decoders, multiplexers, arithmetic operations.
  4. Sequential logic design using DFFs. Designs include shift registers, counters, and sequential circuits (including state diagrams and state tables, and the resulting circuit implementations).
  5. Programmable logic devices: Field Programmable Gate Arrays (FPGA) and applications of programmable logic devices.

Course Structure: The course meets for 4 hours of lecture and weekly laboratory assignments.

Computer Resources: This class is supported by a laboratory which has multiple Intel PCs for development. There will be extensive computer usage in the laboratories for design and simulation with Verilog hardware description language and programmable logic device software packages.

Laboratory: There are weekly laboratory projects. Students are loaned a laboratory kit including an FPGA board, some simple TTL chips, and supporting elements. For each laboratory, the students have to design the circuit, construct it and demonstrate it to the instructor and/or teaching assistant.

Grading: The grade is based upon weekly homework assignments, the laboratory projects, midterm exam, and a comprehensive final examination.

ABET Student Outcome Coverage: This course addresses the following outcomes:

H = high relevance, M = medium relevance, L = low relevance to course.

(1) An ability to identify, formulate, and solve complex engineering problems by applying principles of engineering, science, and mathematics (H)

(2) An ability to apply engineering design to produce solutions that meet specified needs with consideration of public health, safety, and welfare, as well as global, cultural, social, environmental, and economic factors (M)

(6) An ability to develop and conduct appropriate experimentation, analyze and interpret data, and use engineering judgment to draw conclusions (L)

(7) An ability to acquire and apply new knowledge as needed, using appropriate learning strategies (L)

Prepared By: Scott Hauck

Last Revised: 2/15/2019