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UWEETR-2004-0015 Author(s): Keywords: Abstract Designing high quality analog circuits demands special attention and usually is time consuming. To speed up the process, an automatic analog layout retargeting tool based on a “recycling” scheme has been proposed to produce a layout preserving the designer’s expertise through the use of structural symbolic template in a constraint graph form. Unfortunately, the automatically generated template highly restricts changes in the layout topology, which sometimes limits the range of geometric size specifications and consequently affects the layout performance. In this report, a technique to regenerate active device is presented as part of the layout generation tool. Its procedure involves the removal, reconstruction, and reconnection of the geometrically altered device. The scheme also preserves device matching through a mirrored device placement and symmetry constraints enforcement on the template. The implementations are conducted in the constraint-graph template to ensure layout compactness and to secure good rewiring. Together with the active device generator, the retargeting tool successfully generates multiple high-quality layouts, from which the most desirable one can be selected. |